The inversions on both inputs to the NAND gates bothers me. Wouldn’t inverting both inputs as well a the output turn a NAND back into an AND gate?
A NAND gate with two inverted inputs is equivalent to an OR gate. The ouput is only false when both inputs are false.
You’re right, it doesn’t seem like it should but that checks out:
11 1
01 1
01 1
00 0
It should have some kind of latch where there are two things to push and you have to do them both, or just one or the other, or whatever.
The OR gates only have 1 input for some reason. Otherwise very cool!
I thought Logic Gate is the one with the two guardians and one always lies and the other speaks truth. Or is that Logical Gate? 🤔
That brought back memories!
Also provides steps for getting over it.
The middle bar is a perfectly adequate step all by itself
redundant OR gates
Cool but why does that AND gate gotta be like that?
I could never have a gate like that. Nerds from everywhere would be showing up and taking pictures.
All I remember is my professor, circa 2015 “DIAMOND, DECISION!”
Looks illogical to me
