Arthur Besse@lemmy.ml to RISC-V@lemmy.ml · edit-21 month agoChina's SpacemiT develops "VitalStone V100" 64-core RISC-V datacenter CPU on 12nmwww.tomshardware.comexternal-linkmessage-square1fedilinkarrow-up121arrow-down11cross-posted to: hardware@programming.devhardware@lemmy.world
arrow-up120arrow-down1external-linkChina's SpacemiT develops "VitalStone V100" 64-core RISC-V datacenter CPU on 12nmwww.tomshardware.comArthur Besse@lemmy.ml to RISC-V@lemmy.ml · edit-21 month agomessage-square1fedilinkcross-posted to: hardware@programming.devhardware@lemmy.world
minus-squaremerthyr1831@lemmy.mllinkfedilinkEnglisharrow-up4·1 month agoDo we have cores beyond the performance of the c910 yet? Im hoping to see RISCV get to ARM A72+ this year
Do we have cores beyond the performance of the c910 yet? Im hoping to see RISCV get to ARM A72+ this year